Sr. Electrical Engineer FPGA ASIC Designer

PDS Tech, Inc.
Published
October 15, 2020
Location
Camden, NJ
Category
Job Type

Description

PDS Tech is seeking a Sr. Electrical Engineer for an open position in Camden, NJ. 

In your role, you will:

  • Reporting to the Manager, Engineering (ASIC/FPGA), the Senior Member of Engineering Staff (SMES) Design Engineer will be part of the core design team, responsible for the architecture, implementation, verification/validation through Software integration test, for delivery of complex FPGAs AND/OR ASICs systems.

    S/he will develop architectures for implementation of high throughput complex designs involving Cryptographic Algorithms (VHDL, HLS) with high speed protocols– NVMe, PCIe/SRIOV, 10G-400G Ethernet, TCP/IP, and IP development/integration targeting ARM SOC FPGAs (Ex. Xilinx MPSOC) AND/OR ASICs.

    Additionally S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and also writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) running Linux.

    We have deployed state-of-the-art EDA flows/methodologies including Synopsys DC/Primetime/Synplify, Xilinx/Intel/Microchip EDA including HLS, Mentor Questa family, VIPs for UVM, Clock Domain Crossing (CDC), Catapult (HLS).

    This is a key, high impact, high visibility role in the organization to ensure robust quality and delivery of Communication products for National Security.

 
The successful candidate(s) will possess:

• At least 5 year experience with proven track record of implementing complex algorithms in networking ASIC/FPGAs
• Bachelor of Science in Electrical Engineering or Computer Science or equivalent
o Master of Science in Electrical Engineering or Computer Science preferred
• Proficiency in VHDL, C++ (OOP) and System Verilog Assertions (SVA)
• Experience with debugging in ARM ecosystem with Linux OS
• Knowledge of high-speed protocols (PCIe, TCP/IP, Ethernet)
• Excellent Analytical/Debug skills
• Good verbal, written, and presentation skills
• US Government Secret security clearance or ability to obtain clearance required which includes US citizenship

A PLUS for prior experience with:
• High Level Synthesis (HLS) with Vivado, Mentor Catapult
• Xilinx MPSOC, and Vivado SDK and Linux super user
• Cryptographic and high speed networking designs

  •  

PDS Tech, Inc. is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, sexual orientation, gender identity, religion, national origin, disability, veteran status, age, marital status, pregnancy, genetic information, or other legally protected status.

Founded in 1977, PDS Tech, Inc. is one of the nation's premier specialty staffing firms with 31 offices nationwide. We offer a full range of benefits including:

  • Health insurance
  • Paid holidays
  • Weekly payroll
  • Immediate 401(k) eligibility
  • Completion Bonuses
  • Training
  • Please note availability of benefits may vary by position

PDS specializes in Engineering and IT arenas including Aerospace, Defense, Electronics, Telecommunications, Automotive, and Energy just to name a few. Our reputation, track record, and years of continuous growth reflect the commitment to quality that our employees and clients experience first-hand. To find out more about PDS, please visit www.pdstech.com

$$$ PDS pays for referrals! $$$

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